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add CPU architectures: sparc, sparc64
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@@ -2,9 +2,10 @@
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- `c4::first_non_bom()`
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- `c4::get_bom()`
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- `c4::skip_bom()`
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- [PR#148](https://github.com/biojppm/c4core/pull/148): Add support for mips, mipsel, mips64, mips64el architectures
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- [PR#148](https://github.com/biojppm/c4core/pull/148): Add support for mips, mipsel, mips64, mips64el CPU architectures
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- [PR#148](https://github.com/biojppm/c4core/pull/148): Add support for sparc, sparc64 CPU architectures
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- [PR#148](https://github.com/biojppm/c4core/pull/148) and [PR#12 cmake](https://github.com/biojppm/cmake/pull/12): Add support for loongarch, loongarch64 architectures
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- [PR#148](https://github.com/biojppm/c4core/pull/148): Improve CPU detection in armv4 and armv5
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- [PR#148](https://github.com/biojppm/c4core/pull/148) and [PR#12 cmake](https://github.com/biojppm/cmake/pull/12): Add support to loongarch, loongarch64 architectures
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- Minor improvements to doxygen documentation
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@@ -179,6 +179,18 @@
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# error "unknown mips endianness"
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# endif
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#elif defined(__sparc__) || defined(__sparc) || defined(sparc)
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# if defined(__arch64__) || (defined(__SIZE_WIDTH__) && __SIZE_WIDTH__ == 64) || (defined(__LP64__) && __LP64__)
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# define C4_CPU_SPARC64
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# define C4_WORDSIZE 8
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# elif defined(__arch32__) || (defined(__SIZE_WIDTH__) && __SIZE_WIDTH__ == 32) || (defined(__LP32__) && __LP32__)
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# define C4_CPU_SPARC32
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# define C4_WORDSIZE 4
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# else
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# error "unknown sparc architecture"
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# endif
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# define C4_BYTE_ORDER _C4EB
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#elif defined(SWIG)
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# error "please define CPU architecture macros when compiling with swig"
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